Design of digital spread spectrum receiver ofa high dynamic and high pn code rate 高動態高碼速率全數字化解擴接收機的設計
It can meet different customers requirements for different services and code rates ( 5 )能滿足不同用戶不同業務和碼率的要求。
This paper gives the shannon limit analysis and numerical results while the modulation is bpsk . the numerical results of different coding rate are shown 本文對bpsk信號調制格式下的香農限進行了理論分析和數值求解。
This will be begged that the image compression technology not only have good compression efficiency but also can handle nimbly the compression code rate 這就要求圖像壓縮技術不僅要有良好的壓縮效率,而且還可以靈活處理壓縮碼率。
This algorithm firstly calculates the average power serial , and then finishes the detection of pn code rate through the analysis of frequency spectrum and smooth processing 該算法首先計算序列的平均功率,然后對其進行譜分析并作平滑處理而完成偽碼速率的判定。
The channel capacity of awgn channel and rayleigh fading channel with binary input and continuous output are derived and the shannon capacity limits for different code rate are provided . 2 對二元輸入、連續輸出的awgn信道和rayleigh衰落信道的信道容量進行了推導,給出了不同碼率下的shannon容量限。
The parameters include generator polynomial of component codes , interleave length and the type of interleavers , iterative decoding algorithms and iteration number , code rates and channel models et al 這些參數主要包括分量碼、交織長度和交織器類型、迭代譯碼算法和譯碼迭代次數、編碼速率以及信道條件等。
Wide doppler range . varied code length , varied code rate , which have more difficulties . little acquisition time and high acquisition probability are required during the capturing process of spread spectrum signals 對高動態、高碼率、低信噪比、大多普勒及變化的碼長和碼率的擴頻信號的快捕是本文的難點。
The realization of high code rate property is also mentioned . in the end of this paper , the author lays the emphasis on the circuit realization of high - code - rate pcm transmitter with quasi two - point injection techniques 本文的最后部分,作者重點對準兩點注入式高碼速率發射機(主要是調頻源)的電路實現作了詳盡的分析。
On the basis of designing the serial structure of mq encoder , parallel structure of mq encoder is designed using pipelining technique and the coding rate is approximately 1bit / cycle 為了得到更高速率的mq編碼器,采用流水線結構設計了并行的mq編碼器。仿真結果表明mq編碼器的編碼吞吐量明顯提高,達到了硬件規模和編碼效率的平衡。